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Multimedia ICs
Status display LCD driver for PCs with I2C Bus interface
BU9910KV
The BU9910KV is a status LCD driver with I2C Bus intetface. Various lighting mode can be controlled through I2C Bus. In addition, 20 direct drive inputs allow the application to drive 20 elements directly without I2C Bus, so that the system configuration can be kept simple.
*Applications PCs *Featuresinterface. 1) I C Bus
2
2) Drive up to 44 LCD cells. 4 common x 11 segment, 1 / 3 bias, 1 / 4 duty 3) Blink operation for eaeh cell. 4) Support four frame frequencies 256Hz, 128Hz, 64Hz, 32Hz (at fOSC = 32.768kHz)
5) 20 direct drive inputs, which allow the application to drive LCD directly without I2C control. 6) Minimum LCD drive time is guaranteed for direct in. 7) LCD device test ferminals.(LCDT0, LCDT1) 8)Power aupply voltages: 3.3V to 5.0V
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Multimedia ICs
BU9910KV
*Block diagram
DIN19 DIN18 DIN17 DIN16 DIN15 DIN14 DIN13 DIN12 DIN11 DIN10 DIN9 36 35 34 33 32 31 30 29 28 27 26 DIN8 25
SEG10
37 Date Latch Logic
24
DIN7
SEG9
38
23
DIN6
SEG8
39 Control Logic
22
DIN5
SEG7
40
21
DIN4
SEG6
41 I2CBus Interface
20
DIN3
SEG5
42
Segment Driver
19
DIN2
SEG4
43 Timing Generator
18
DIN1
SEG3
44
17
DIN0
SEG2
45 Common Driver
16
HT1
SEG1
46
15
HT0
SEG0
47
14
LCDT1
VDD
48
13
LCDT0
1
2
3
4
5
6
7
8
9
10
11
12
COM3
COM2
COM1
COM0
#RES
GND
SDA
2
SCL
CLK
VL3
VL2
VL1
Multimedia ICs
BU9910KV
*Pin descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Pin name VL3 VL2 VL1 GND COM3 COM2 COM1 COM0 CLK #RES SDA SCL LCDT0 LCDT1 HT0 HT1 DIN0 DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 DIN8 DIN9 DIN10 DIN11 DIN12 DIN13 DIN14 DIN15 DIN16 DIN17 DIN18 DIN19 Input for LCD driver Input for LCD driver (2 / 3) Input for LCD driver (1 / 3) Ground LCD common driver output 3 LCD common driver output 2 LCD common driver output 1 LCD common driver output 0 Clock input (ex.32.768kHz) Reset I2CBus Serial Data Line I2CBus Serial Clock Input LCD Device test mode set 0 LCD Device test mode set 1 Direct IN Hold time set 0 Direct IN Hold time set 1 Direct IN 0 Direct IN 1 Direct IN 2 Direct IN 3 Direct IN 4 Direct IN 5 Direct IN 6 Direct IN 7 Direct IN 8 Direct IN 9 Direct IN 10 Direct IN 11 Direct IN 12 Direct IN 13 Direct IN 14 Direct IN 15 Direct IN 16 Direct IN 17 Direct IN 18 Direct IN 19 Function
VL3 VL3
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Multimedia ICs
BU9910KV
Pin No. 37 38 39 40 41 42 43 44 45 46 47 48
Pin name SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 VDD LCD segment driver output 10 LCD segment driver output 9 LCD segment driver output 8 LCD segment driver output 7 LCD segment driver output 6 LCD segment driver output 5 LCD segment driver output 4 LCD segment driver output 3 LCD segment driver output 2 LCD segment driver output 1 LCD segment driver output 0 Supply Voltage 3.0V to 5.5V
Function
*Absolute maximum ratings (Ta = 25C)
Parameter Applied voltage Power dissipation Operating temperature Storage temperature Input voltage Symbol VDD Pd Topr Tstg VIN Limits 7.0 400 - 15 ~ + 75 - 55 ~ + 125 GND - 0.5 ~ VDD + 0.5 Unit V mW C C V
Reduced by 4mW for each increase in Ta of 1C over 25C.
ROHM holds a license from Philips semicondoctors for the "I2C Bus."
*Electrical characteristics (unless otherwise noted, Ta = 25C, VDD = 5.0V)
Parameter Circuit current Input high level voltage Input low level voltage Input high level current Input low level current SDA pin Output low level voltage Output fall time COM, SEG pins Output intermediate level voltage VL3 Output intermediate level voltage VL2 Output intermediate level voltage VL1 Output low level voltage LCDT pin Pull-up resistance
Not designed for radiation resistance.
Symbol IDD VIH VIL IIH IIL
Min. 20 VDD0.7 - 0.5 -- - 1.0
Typ. 35 VDD 0.0 0.0 0.0
Max. 50 VDD + 0.5 VDD0.3 1.0 --
Unit A V V A A
Conditions Bias 51k x 3 -- -- -- --
VOLsda tfsda
0.0 --
0.2 --
0.6 250
V ns
IOL = 6.0mA CL = 400pF IOL = 6.0mA
VOM3 VOM2 VOM1 VOL
VL3 - 0.1 VL2 - 0.1 VL1 - 0.1 0.0
VL3 VL2 VL1 0.2
VL3 + 0.1 VL2 + 0.1 VL1 + 0.1 0.6
V V V V
IOM3 = 100A IOM2 = 100A IOM1 = 100A IOL = 100A
RPU
24k
30k
36k
--
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Multimedia ICs
BU9910KV
*Input / output circuits
Pin No. Pin name Equivalent circuit Pin description
11
SDA
I2C Bus serial data input / output.
12
SCL
I2C Bus serial clock Input.
9
CLK
Clock Input for LCD display. Clock frequency is 32.768kHz.
Reset input.(Low Active) Low: Reset all internal registers. 10 #RES Note: Require external power on reset.
4
GND
Ground terminal.
48
VDD
Power supply. 3.0V to 5.5V supply voltage range.
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Multimedia ICs
BU9910KV
Pin No.
Pin name
Equivalent circuit
Pin description
5~8
COM0 ~ COM3
LCD common drive output.
37 ~ 47
SEG0 ~ SEG10
LCD segment drive output.
Input of LCD drive voltage setting. 1 2 3 VL3 VL2 VL1 Supply the 2 / 3 VL3 voltage to VL2. Supply the VDD or the zero to VDD voltage to VL3 . Supply the 1 / 3 VL3 voltage to VL1.
17 ~ 36
DIN0 ~ DIN19
Direct drive Input.(High Active) The drive time is set from the HT0 and HT1 terminals, and the drive starts from a rising edge of the direct drive Inputs. LCD cells will be driven while the direct drive Input remains high.
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Multimedia ICs
BU9910KV
Pin No.
Pin name
Equivalent circuit
Pin description
15 ~ 16
HT0 ~ HT1
Hold time setting terminal of the direct drive input. There are four hold times to drive the cell.
30k: VDD = 5.0V 13 ~ 14 LCDT0 ~ LCDT1
LCD device test terminal.
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Multimedia ICs
BU9910KV
*Application example
VDD
VDD VR VL3 R VL2 R VL1 C C C R GND BU9910KV
COM0 COM1 COM2 COM3
SEG0 SEG1 44 Segment LCD
Power on Reset
#RES CLK SCL SDA
SEG9 SEG10
fosc = 32.768kHz I2C Bus Controller
DIN0 DIN1 Set direct in hold time LCD panel test HT0 HT1 Direct In (HDD.FDD.etc)
LCDT0 LCDT1
DIN18 DIN19
Note: Choose appropriate values of Road C and R for the LCD panel and application.
Fig.1
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Multimedia ICs
BU9910KV
*Circuit operationthe I C Bus interface (1) Description of
2
1) Slave address
0 MSB 1 1 1 0 0 1 R/W LSB
2) Conformance to I2C Bus standards
Parameter SCL clock frequency Start condition hold time Start condition setup time Data setup time Data hold time Stop condition setup time Symbol f SCL t HD: STA t SU: STA t SU: DAT t HD: DAT t SU: STO Min. 0 0.6 0.6 100 0 0.6 Max. 400 - - - 0.9 - Unit kHz s s ns s s
(Start condition)
SCL
SDA t SU: STA (Data condition) t HD: STA
SCL
SDA t SU: DAT (Stop condition) t HD: DAT
SCL
SDA t SU: STO
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Multimedia ICs
(2) Data structure 1) Wrote Mode
S Address - W A Command Reg. Byte A Write Data Byte Auto Increment A
BU9910KV
P
2) Read Mode 1. Command register set
S Address - W A Command Reg. Byte A - A
Sr
Address
R
A
Read Data Byte Auto Increment
P
2. Preset command register
S Address R A Read Data Byte Auto Increment - A P
In multi-master application, the preset command register mode is prohibited. S: Start condition P: Stop condition Sr: Restart condition A: Acknowledge A: Acknowledge bar (3) Mode settings table 1) Command Register (commands and pointers)
D7 Disp D6 D5 D4 Blink freq. D3 D2 D1 D0
Frame freq.
Pointer register
The all bit may be "0"during the reset procedure.
D7: Display control 0: Light (depend on the LCD segment data memory status ) 1: All off D6, D5: Frame frequency select
D6 0 0 1 1 D5 0 1 0 1 f0 32Hz (default) 64Hz 128Hz 256Hz
At fosc = 32.768kHz
D4: Blink frequency select 0: Blink frequency = 0.5Hz (default) 1: Blink frequency = 1Hz
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Multimedia ICs
BU9910KV
D3 to D0: Pointer register The Pointer register appoints a base address, which acceses the LCD display memory in read or write mode. In the write mode, a byte data that follows command byte is written to the LCD display memory which is appointed by the pointer register. Write address is incremented automatically and more than 2 bytes data are written to continuous place that starts from the base address. A master controller can continue to access the LCD display memory untill it generates the stop condition. In the read mode, the master reads the LCD display memory data that is appointed by the pointer register. Read adress is incremented automatically and the master read the LCD display memory data of continuous address that starts from the base address. The master can continue to access the LCD display memory data until it generates the NO ACK & Stop Condition. The pointer register value should be 0000b(0h) to 1011b(Bh) and becomes 0h after Bh. Do not set Ch, Dh, Eh, Fh to the pointer register.
2) LCD display memory LCD driving condition
Segment data memory 0 0 1 1 Blink control memory 0 1 0 1 Driving condition Off Off Light Blink
Segment data memory: SEG vs. COM(COM No. / SEG No.)
Base address 0000b 0001b 0010b 0011b 0100b 0101b bit7 3/1 3/3 3/5 3/7 3/9 0 bit6 2/1 2/3 2/5 2/7 2/9 0 bit5 1/1 1/3 1/5 1/7 1/9 0 bit4 0/1 0/3 0/5 0/7 0/9 0 bit3 3/0 3/2 3/4 3/6 3/8 3 / 10 bit2 2/0 2/2 2/4 2/6 2/8 2 / 10 bit1 1/0 1/2 1/4 1/6 1/8 1 / 10 bit0 0/0 0/2 0/4 0/6 0/8 0 / 10
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Multimedia ICs
Blink control memory: SEG vs. COM(COM No. / SEG No.)
Base Address 0110b 0111b 1000b 1001b 1010b 1011b bit7 3/1 3/3 3/5 3/7 3/9 0 bit6 2/1 2/3 2/5 2/7 2/9 0 bit5 1/1 1/3 1/5 1/7 1/9 0 bit4 0/1 0/3 0/5 0/7 0/9 0 bit3 3/0 3/2 3/4 3/6 3/8 3 / 10 bit2 2/0 2/2 2/4 2/6 2/8 2 / 10 bit1 1/0 1/2 1/4 1/6 1/8 1 / 10
BU9910KV
bit0 0/0 0/2 0/4 0/6 0/8 0 / 10
3) Direct drive input description Direct input pin vs.SEG / COM
SEG6 COM0 COM1 COM2 COM3 DIN0 DIN1 DIN2 DIN3 SEG7 DIN4 DIN5 DIN6 DIN7 SEG8 DIN8 DIN9 DIN10 DIN11 SEG9 DIN12 DIN13 DIN14 DIN15 SEG10 DIN16 DIN17 DIN18 DIN19
In the test mode, the specified lighting is carried out regardless of the state of the segment data register. Setting pins to the open state returns to the normal state without carrying out a reset.
Holding time setting(when activate the direct input pins)
HT1 L L H H HT0 L H L H Holding time 0.125s 0.250s 0.500s 1.000s HT < 0.156s HT < 0.313s HT < 0.625s HT < 1.250s
At fosc = 32.768kHz
4) LCD device test terminal description LCD device test pins setting table
LCDT1 L L H H LCDT0 L H L H Lighting conditions Test mode : All cells are turned on Test mode : 10100101b (set all Segment Data Memory) Test mode : 01011010b (set all Segment Data Memory) Normal: Controlled by the LCD display memory
When these pins are low, the Segment data memory are ignored. Each of LCDT1 and LCDT2 has a pull-up resister. When these pins are open, return to nomal operation without reset.
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Multimedia ICs
(4) Output waveforms (1 / 2)
To = 1 / fo
BU9910KV
* COM 0 Drive Output
VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS 1 / 3 bias, 1 / 4 duty waveforms
* COM 1 Drive Output
* COM 2 Drive Output
* COM 3 Drive Output
* SEG Drive Output COM 0-off, COM 1-off, COM 2-off, COM 3-off
* SEG Drive Output COM 0-ON, COM 1-off, COM 2-off, COM 3-off
* SEG Drive Output COM 0-off, COM 1-ON, COM 2-off, COM 3-off
* SEG Drive Output COM 0-off, COM 1-off, COM 2-ON, COM 3-off
* SEG Drive Output COM 0-off, COM 1-off, COM 2-off, COM 3-ON
* SEG Drive Output COM 0-ON, COM 1-ON, COM 2-ON, COM 3-ON
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Multimedia ICs
(5) Output waveforms (2 / 2)
To = 1 / fo
BU9910KV
* COM 0 Drive Output
VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS VL3 VL2 VL1 VSS 1 / 3 bias, 1 / 4 duty waveforms
* COM 1 Drive Output
* COM 2 Drive Output
* COM 3 Drive Output
* SEG Drive Output COM 0-ON, COM 1-off, COM 2-ON, COM 3-off
* SEG Drive Output COM 0-ON, COM 1-off, COM 2-ON, COM 3-off
* SEG Drive Output COM 0-ON, COM 1-off, COM 2-off, COM 3-ON
* SEG Drive Output COM 0-off, COM 1-ON, COM 2-ON, COM 3-off
* SEG Drive Output COM 0-off, COM 1-ON, COM 2-off, COM 3-ON
* SEG Drive Output COM 0-off, COM 1-off, COM 2-ON, COM 3-ON
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Multimedia ICs
BU9910KV
*External dimensions (Units: mm)
9.0 0.3 7.0 0.2 36 9.0 0.3 7.0 0.2 37 48 1 1.425 0.1 0.10 25 24 13 12 0.5 0.125 0.1 0.10
0.5
0.2 0.1
VQFP48
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